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IP Cores

Great River Technology

IP Core (transceiver core)—Implement reliable ARINC 818–compliant interfaces in Xilinx and Altera PLDs. GRT's core uses FPGA serial transceivers to achieve ARINC 818 interfaces up to 12.75 Gb/s. GRT can configure an IP cores for receive-only, transmit-only, or transmit-and-receive applications. Learn more.

Block diagram for transmitter configuration